2020 IXPUG US Annual Meeting 

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Experts from around the world are invited to join us online 
for the 

IXPUG 2020 Annual Meeting

October 13-16, 2020 – Hosted by TACC via Zoom 

 

Agenda

 

  Thursday, October 15 -- All times listed for Austin/CDT (UTC -5) 

Start	End	Title	Author	Presentation	Video
10:00	10:15	Welcome	Stephen Harrell & Amit Ruhela, Meeting Co-Chairs
10:15	12:00	Tutorial: Performance Tuning and Best Practices to leverage Intel MPI on Multicore Processors	Amit Ruhela	Presentation	(Not available)
12:00	12:30	Break
12:30	14:00	Tutorials: OneAPI/ DPC++ Essential Series hands on (Through Friday) oneAPI Intro Module: (This module is used to introduce oneAPI, DPC++ Hello World and Intel DevCloud) DPC++ Program Structure: (Classes - device, device_selector, queue, basic kernels and ND-Range kernels, Buffers-Accessor memory model, DPC++ Code Anatomy)	Praveen Kundurthy	Presentation	Recording
14:00	14:15	Break
14:15	15:15	Tutorial: DPC++ New Features - Unified Shared Memory (USM), Sub-Groups (Intel oneAPI DPC++ Library -Usage of oneDPL,  Buffer Iterators and oneDPL with USM )	Rakshith Krishnappa	Presentation	Recording
15:15		Closing Remarks

 

 Friday, October 16 -- All times listed for Austin/CDT (UTC -5) 

 

Start	End	Title	Author	Presentation	Video
10:00	10:15	Welcome	Stephen Harrell & Amit Ruhela, Meeting Co-Chairs
10:15	11:30	Tutorial: Migration of GPGPU Applications to DPC++ with Lab - Compatibility tool	Edward Mascarenhas and Sunny Gogar	Presentation	Recording
11:30	12:00	Break
12:00	13:30	Tutorial: Running DPC++ code on GPGPU	Ruyman Reyes and Stuart Adams	Presentation	(Not available)
13:30	13:45	Break
13:45	14:30	Tutorial: Cache-Aware Roofline Model: Performance, Power and Energy-Efficiency	Aleksandar Ilic	Presentation	Recording
14:30	15:30	Tutorial: Profile DPC++ and GPU Workload Performance-VTune, Advisor, Roofline analysis	Vladimir Tsymbal	Presentation	Recording
15:30	15:45	Break
15:45	16:45	Tutorial: FPGA offload on DPC++	Ricardo Menotti	Presentation	Recording
16:45		Conference Closing Remarks

 

Just Announced! oneAPI Bring-Your-Own-Code (BYOC) Workshop

Have a code that will benefit from heterogenous hardware? In this workshop on Monday, October 19th 8:00AM-12:00PM PT (10:00AM-2:00PM CT) you will have an opportunity to work directly with oneAPI experts to make the code heterogenous. Register via Webex HERE. Participants present their workload and instructors answer questions. Each team gets half an hour and follow up sessions scheduled individually as needed based on topics below: 

DPC++ essentials – Praveen Kundurthy and Rakshit Krishnappa
DPCT – Sunny Gogar and Edward Mascarenhas
DPC++ GPGPU – Ruyman Reyes
Advisor – Vladimir Tsymbal and Prof Aleksandar Ilic
FPGA – Ricardo Menotti
AI/oneDAL/XGBoost – Louie Tsai, Rachael Oberman

We will consider BYOC workshop successful if we are able to help you in porting and tuning of the participants’ codes, either during the workshop or up to two weeks after the workshop.

Call for Presentations:

This Intel eXtreme Performance User Group (IXPUG) conference is focused on all aspects of adopting and employing state-of-the-art technologies and practices for optimal application execution. This includes accelerators (e.g., co-processors, FPGAs, GPUs), as well as topics related to system hardware beyond the processor (memory, interconnects, etc.), software tools, programming models, HPC workloads, troubleshooting, and more — all with a focus on Intel platforms. The conference will provide an interactive experience, organized around key themes associated with high-performance computing, data analytics, artificial intelligence (machine learning and deep learning), cloud computing, and more. The conference will feature keynote presentations, invited expert talks, 30-minute technical sessions, 10-to-15-minute lightning talks, and two-hour hands-on tutorials. Speakers come from a wide variety of HPC organizations and share their real-world experiences. Attendees will encounter an open forum, through which Intel and renowned industry experts will share best practices and techniques for maximizing software productivity and efficiency. The conference will provide an opportunity to share experiences in leveraging Intel architectures and technologies with all attendees, including expert software developers, scientists, researchers, academics, systems analysts, students, and end-users, etc. The challenges surrounding application performance and scalability will be covered across at all levels, including tuning and optimization of diverse sets of applications on large-scale HPC systems.

• Implications of workload behavior on system design at extreme scale (Power, Reliability, Scalability, Performance, Processor Design, Memory System, I/O)
  
  
• Software environments and tools for computing at extreme scale (Instrumentation, Debugging/Correctness, Thread and Process Management, Libraries and Language Development)
  
• Experience using extreme scale systems: Usability, In-situ Visualization, Programming Challenges, Algorithms and Methods, etc.
  
• Application characterization on emerging technologies: Novel Memories (NVM), processors (Intel® Xeon Scalable processor, Intel® FPGA, etc.)